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13.3: UART

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    Universal Asynchronous Receiver-Transmitter (UART) is one of the oldest forms of communication. These are the old serial ports of old computers and has been replaced by USB. The data is sent serial as a "data frame".  It is "universal" because it can operate over multiple parameters like speed and data size.  It is asynchronous because it does not need a clock to synchronize the transmitting and receiving of the data, although they need to be at common BAUD rates.


    • 2 lines and 3 pins
      • TX (Transmit line and pin)
      • RX (Receive line and pin)
      • GND (Ground)
    • Asynchronous, bidirectional serial data transmission
      • no clock, it uses a "start bit" and an "end bit"
    • Limited to one sensor
    • BAUD rate (bps or bits per second) 1200, 2400, 4800, 9600, 19200, 38400, 57600 and 115200
      • 115200 is default BAUD rate
      • both devices must operate at the same BAUD rate
    • slow, but easy to implement

    UART Fundamentals

    Data flows from TX pin of Transmitter to RX pin of receiver.  The transmitter can convert parallel data from CPU to serial for communication and then the receiver can convert it back to parallel data 

    clipboard_e07485b44cad1e7fe4efd855fbabe6292.pngFigure \(\PageIndex{1}\):UART pins and lines for device to device communication  (Belford CC0.0)


    3 modes of operation

    • Simplex (data only goes in one direction)
    • Half-Duplex (data transmission in both directions but not simultaneously)
    • Full Duplex (simultaneous data transmission in both directions)

    UART Data Frame


    clipboard_e45cf6b0372ff7b36741555621c45cf28.pngFigure \(\PageIndex{2}\): UART data frame. (Belford CC0.0)

    The data frame has bits that are either high or low. The start bit tells the receiver when a frame is coming and when it is ending.  The parity bit is optional and is used to ensure the data is properly transmitted.  Since each device has an TX and RX pin, the data can operate in Full Duplex mode where one wire is sending it in one direction and the other in the opposite direction.


    • Transmitter receives data to be transferred, often from a parallel bus (as CPUs use those because they are faster)
    • add start bit, then parity and stop bit
      • parity data checks for data integrity
    • Data packet is transmitted until complete
      • Uses a FIFO buffer (First In, First Out) to serialize the stream
    • Data in receiving FIFO is cleared as it is transferred 



    This page titled 13.3: UART is shared under a not declared license and was authored, remixed, and/or curated by Robert Belford.

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